Synopsis Engineering - On-site work

Join Synopsys as a Senior Staff R&D Engineer in Sunnyvale. Develop next-generation EDA tools using C++ and AI/ML for FPGA synthesis and silicon verification. Leverage 8-10+ years of software engineering expertise in a collaborative, innovative environment. Enjoy comprehensive benefits, stock opti...

Lead the architecture of next-generation Die-to-Die IP as an Analog IC Design Architect at Synopsys. This Boxborough-based role requires 15+ years of PHY analog design expertise, including SERDES/DDR. You will drive design trade-offs, mentor teams, and enable cutting-edge chiplet systems. We offe...

Join Synopsys AGI as a Senior R&D Engineer (Space) in Exton, US. Develop the critical ODTK software for space mission engineering using C++/C#. Collaborate with experts on orbit determination and trajectory optimization within an agile team. Enjoy competitive benefits, stock options, and comprehe...

Join Synopsys as an Analog Models & Verification Engineer, Architect in Chandler. Develop high-fidelity behavioral models for advanced SerDes blocks using SystemVerilog and Python. This role requires 7+ years of experience in analog/mixed-signal design and verification. We offer comprehensive ben...

Join Synopsys in Porto as a Senior Security Design Engineer. You will design and verify RTL for Security IP using System Verilog/UVM. This role requires 5+ years of RTL design/verification experience and a Master's/PhD in EE or CS. We offer comprehensive benefits, stock plans, and a collaborative...

Launch your data career with this hands-on internship in Maia, Porto. You will support dashboard creation, clean and analyze data, and define key KPIs. We seek a master's student with Excel proficiency, basic SQL, and a keen analytical mindset. Gain real-world experience in a collaborative, innov...

Join Synopsys in Hsinchu as a Synthesis Applications Senior Engineer. Provide expert technical support for synthesis tools like Design Compiler and Fusion Compiler. Utilize your experience in logic synthesis, timing analysis, and customer collaboration. Enjoy comprehensive benefits, stock plans, ...

Join Synopsys in Bengaluru as a Staff/Senior Staff RTL Design Engineer. You will develop and verify RTL for memory test IP, using SystemVerilog, UVM, and DFT methodologies. This role requires 3-5 years of ASIC design experience and expertise with EDA tools like VCS and Verdi. We offer comprehensi...

Join our ASIC and Firmware Design Apprenticeship in Bengaluru, India. This role is for 2024/25 Electronics or CS graduates to gain hands-on experience in mixed-signal SerDes design. You'll collaborate with experts on the full PHY IP lifecycle, from specification to testing. Strong digital design ...

Join Synopsys in Yerevan as a Full-Stack Staff Engineer. You will design scalable web apps using React, Node.js, and Python, while integrating AI/ML models. This role requires 5+ years of experience and expertise in modern CI/CD and databases. We offer comprehensive benefits, stock plans, and fle...