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Verification Engineer

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ARM

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Location:
India , Noida

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Category:
IT - Software Development

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Contract Type:
Not provided

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Salary:

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Job Description:

We are seeking skilled SoC (System-on-Chip) ARM Power architecture, Soc clock and reset verification engineer and to join our dynamic team. Arm’s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need talented engineers to join a team responsible for the development of sophisticated Subsystems and Solutions across Enterprise, Auto and Client markets.

Job Responsibility:

  • Writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules
  • Leading a team of engineers to own and power, clk/rst verification for a complex IoT chip
  • Collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development and build a functional verification strategy
  • Support mentor junior team members

Requirements:

  • 3 - 6 years of proven experience in working on SoC verification environments across Power verification involving multiple power islands and clock and reset verification
  • Knowledge of assembly language (preferably ARM), C/C++ and hardware verification languages (e.g. SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.)
  • Experience in one or more of various verification methodologies – UVM/OVM, formal, low power
  • Good knowledge and working verification experience in Arm M class CPU Processors
  • Good experience in handling Power aware verification with complex power architecture
  • Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation and support
  • Understanding of the fundamentals of Arm system architectures
  • Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools, UPF, and Debuggers
  • Experience in working and debugging Soc in DFT mode
  • Exposure to various front-end verification tools - Questa, VCS, Jasper Gold, Verdi
  • Experience in Coverage - Functional, Toggle, Code - closure at Subsystem and SoC level

Nice to have:

  • Possess knowledge of object-oriented programming concepts
  • Experience in Client/IOT SoC design verification
  • Strong understanding of CPU, Interconnect Architecture/micro-architectures
  • Familiarity of Unix / Linux working environment
What we offer:
  • Health and Wellness
  • Work and Life Success
  • Financial Rewards
  • Development and Support

Additional Information:

Job Posted:
January 29, 2026

Work Type:
Hybrid work
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