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Senior Silicon Design Engineer

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AMD

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Location:
India , Bangalore

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Contract Type:
Not provided

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Salary:

Not provided

Job Description:

As key member of the AMD EPYC Server team, the successful candidate will play a significant role in ensuring the quality of next generation EPYC Server SoCs through structural DFT, Automatic Test Pattern Generation (ATPG) and Logic Built-In Self-Test (LBIST) techniques.

Job Responsibility:

  • Working closely with the Architecture team to understand the DFT Architecture and implementation
  • Interfacing with the Design teams to ensure DFT design rules and guidelines are met
  • Working with the PD team to ensure to correct DFT implementation and closing timing
  • Generating high quality manufacturing test patterns for stuck-at, transition fault models and through the use of on-chip test compression techniques
  • Simulating and verifying the ATPG and LBIST patterns
  • Analyzing and working with the different stakeholders to get the required design changes in to get the maximum ATPG coverage
  • Working with the Product engineering teams on the delivery of manufacturing test patterns
  • Working with the Product Engineering teams on Silicon bring-up and debugs
  • Developing, enhancing and maintaining scripts as necessary

Requirements:

  • Exposure to DFT Architecture and Design
  • Good working knowledge of ATPG tools (Mentor TK)
  • Exposure to Static timing analysis & Timing closure is required
  • Excellent hands-on debug skills and scripting skills are critical
  • Must have good communication skills and the ability to work in a worldwide team environment
  • B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering with 3+ years of DFT experience

Additional Information:

Job Posted:
January 05, 2026

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