Principal Engineer, ASIC Development Engineering (RTL Design) Job at Sandisk (Bengaluru)

Principal Engineer, ASIC Development Engineering (RTL Design)

We are seeking a highly experienced and motivated Principal Engineer specialisin...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Electrical/Electronic Engineering or related field
9+ years of experience in digital design, with a focus on RTL design for complex SoCs
Deep expertise in Verilog/SystemVerilog
Strong understanding of SoC architecture, AMBA protocols (AXI/AHB/APB), interconnects and peripherals for debug
Experience with synthesis, static timing analysis, and DFT concepts
Hands-on with EDA tools (simulation, lint, CDC, synthesis, formal verification)
Proven track record of leading technical teams and delivering successful silicon
Excellent analytical, problem-solving, and communication skills
Passion for innovation and delivering high-quality, scalable solutions

Job Responsibility

Define and review SoC architecture and design specifications
Develop high-quality RTL which is synthesizable using Verilog/SystemVerilog
Ensure robust design methodologies, including lint, CDC, RDC and FC-Elab
Drive Cross-Functional Collaboration: Partner with SoC Design, Verification, Validation, DFT, Physical Design, Mixed-Signal IP, Foundry, Hardware, Firmware, and Test Engineering
Mentor and Inspire: Provide technical leadership and mentorship to engineering teams, fostering a culture of innovation, accountability, and continuous improvement
Technical Excellence: Drive integration and debug efforts for subsystem and full-chip level. Analyse design trade-offs and guide design optimisations for area, performance, and power
Contribute to IP selection, evaluation, and integration in SoC designs
Communicate with Impact: Deliver clear, concise, and transparent project updates to stakeholders, ensuring alignment across all levels

Fulltime

Principal Engineer, ASIC Development Engineering (RTL Design)

We are seeking a highly experienced and motivated Principal Engineer specialisin...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Electrical/Electronic Engineering or related field
9+ years of experience in digital design, with a focus on RTL design for complex SoCs
Deep expertise in Verilog/SystemVerilog
Strong understanding of SoC architecture, AMBA protocols (AXI/AHB/APB), interconnects and peripherals for debug
Experience with synthesis, static timing analysis, and DFT concepts
Hands-on with EDA tools (simulation, lint, CDC, synthesis, formal verification)
Proven track record of leading technical teams and delivering successful silicon
Excellent analytical, problem-solving, and communication skills
Passion for innovation and delivering high-quality, scalable solutions

Job Responsibility

Define and review SoC architecture and design specifications
Develop high-quality RTL which is synthesizable using Verilog/SystemVerilog
Ensure robust design methodologies, including lint, CDC, RDC and FC-Elab
Drive Cross-Functional Collaboration: Partner with SoC Design, Verification, Validation, DFT, Physical Design, Mixed-Signal IP, Foundry, Hardware, Firmware, and Test Engineering
Mentor and Inspire: Provide technical leadership and mentorship to engineering teams, fostering a culture of innovation, accountability, and continuous improvement
Technical Excellence: Drive integration and debug efforts for subsystem and full-chip level. Analyse design trade-offs and guide design optimisations for area, performance, and power
Contribute to IP selection, evaluation, and integration in SoC designs
Communicate with Impact: Deliver clear, concise, and transparent project updates to stakeholders, ensuring alignment across all levels

Fulltime

New

Principal Design Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Mountain View

Salary:

139900.00 - 274800.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
This role will require access to information that is controlled for export under export control regulations
10+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog and Clock Domain Crossing (CDC)/Lint closure
8+ years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SOC designs
5+ years of experience in Synthesis, Timing constraints, Power, Performance, Area (PPA) trade-offs and Post-Silicon Debug
5+ experience in Designing Fabric/Network On Chip or Networking ASICs or Complex Control Logic

Job Responsibility

Part of the design team driving many facets of high performance, high bandwidth designs
Working on Intellectual Property (IP) microarchitecture specification, Register Transfer Level (RTL) design, synthesis, and System on Chip (SOC) integration on different subsystems
Interacting with various teams, including architecture, verification, and physical design, ensuring that the design is implemented and verified to the spec

Fulltime

Principal Logic Design Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Raleigh

Salary:

139900.00 - 274800.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
This role will require access to information that is controlled for export under export control regulations
As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status
To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport

Job Responsibility

Establish yourself as an integral member of a digital logic design team for the development of AI components with focus on micro-architectural based functions and features
Be responsible for the logic design/Register Transfer Level (RTL) entry, design quality including Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), power etc., and timing closure of high-performance digital IP
Collaborate with the verification team to ensure the implementation meets both architectural and micro-architectural intent
Interface with physical design (PD), design for test (DFT), and other teams to optimize tradeoffs within the design
Provide technical leadership through mentorship and strong teamwork

Fulltime

ASIC Digital Design Principal Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...

Location

India , Bengaluru

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Electrical Engineering (BSEE/MSEE) or related field
Minimum 6 years of experience in bare metal firmware development and silicon testing
Strong understanding of digital design (RTL) and mixed-signal integration principles
Experience with structured firmware development, verification, and documentation processes
Proficiency in project execution, from initial specification through to final testing and validation
Knowledge of SerDes standards and scripting (Shell/Python) is a strong advantage

Job Responsibility

Designing, developing, and testing bare metal firmware for advanced mixed-signal ASICs, with a focus on high-speed SerDes products
Collaborating with analog and digital teams to define specifications and integration requirements for IP blocks and system-on-chip (SoC) solutions
Executing structured firmware development processes, including verification and thorough documentation of design flows
Performing functional and performance tests on prototype test-chips to ensure robust operation and compliance with design specifications
Supporting customer teams by providing technical expertise, troubleshooting, and guidance throughout the product lifecycle
Contributing to project planning, tracking milestones, and ensuring timely delivery of high-quality deliverables
Engaging in continuous learning to stay abreast of industry advancements in SerDes standards, scripting, and digital design methodologies

What we offer

Comprehensive medical and healthcare plans that work for you and your family
Time Away in addition to company holidays, we have ETO and FTO Programs
Family Support maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Retirement Plans save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Principal System Architect

Are you passionate about shaping the future of smartphones and Windows-on-ARM la...

Location

United Kingdom , Cambridge

Salary:

Not provided

ARM

Expiration Date

Until further notice

Requirements

Proven track record in smartphone or laptop (Windows on ARM) SoC hardware architecture or a closely related domain
Solid understanding of SoC architecture, microarchitecture, RTL design, and post-silicon validation of complex chips
Deep technical knowledge in one or more of the following domains: Power, thermal, and limits management
Reset and Boot Architecture
Security Architecture
2.5D/3D chiplet technologies
Debug & Telemetry Architecture
Chipset and platform-level system design
Experience with complete ASIC design flows and successful silicon/product commercialization
Demonstrated ability to lead through ambiguity, influence across organizational boundaries, and drive execution

Job Responsibility

Collaborate with engineering leadership and product planning teams to define SoC hardware architecture specifications for mobile and laptop platforms
Develop high-level architectural blueprints that guide engineering teams in designing and verifying platforms across these markets
Translate technology and market requirements into clear architectural, IP, and software requirements
Partner closely with Arm’s technology domain and core teams to ensure architectural readiness aligned with the product roadmap
Evaluate and refine architectural proposals, driving cross-functional alignment between hardware, software, and platform groups
Design experiments and analyses to explore architectural trade-offs, and lead the development of reference designs and next-generation chiplets/SoCs
Represent Arm externally with strong technical credibility — engaging customers, gathering insights, and incorporating feedback to shape future solutions

New

Safety Intern

Join Lhoist North America’s dynamic internship program and gain hands-on experie...

Location

United States , Calera

Salary:

Not provided

Lhoist

Expiration Date

Until further notice

Requirements

Strong analytical skills
Open to feedback and eager to learn
Proactive and positive approach to work
Effective communication skills, both oral and written
High learning agility
English is mandatory
Willingness to travel if necessary

Job Responsibility

Tackle Real Projects: Dive into projects outlined by management and be ready to adapt to new challenges
Learn and Grow: Seek out work and learning opportunities proactively
Communicate Like a Pro: Engage with various levels of the organization and keep your manager/mentor updated on your progress
Improve Processes: Work efficiently and effectively to help improve processes at your location
Embrace Our Culture: Live our values of Respect, Integrity, and Courage. Work safely, especially around heavy equipment, and be a valued team member
Showcase Your Work: Present your project overview to Senior Leaders and local management at the end of the program
Stay Curious: Be eager to learn new skills and participate in all intern program activities (orientation, mid-term session, closing session, etc.)
Get There: Ensure you can transport yourself to and from the work location
And More: Take on other duties as assigned

What we offer

Comprehensive medical, dental, vision, life, and disability insurance
Paid vacation and sick time
Attractive 401(k) Retirement Savings Plan with a generous Employer Match
Supplemental Contribution based on your Years of Service
Educational assistance

Fulltime

New

Healthcare Assistant

Help us to deliver great primary care by improving access, outcomes and patient ...

Location

United Kingdom , Nottingham

Salary:

26000.00 - 30000.00 GBP / Year

Operose Health

Expiration Date

February 20, 2026

Requirements

Experience in a Primary Care setting and phlebotomy is essential
Able to work within processes, procedures and maintain confidently and data security
Must be able to adapt with changing priorities and be personable, polite and patient with our patients
Must have basic PC skills such as Word, Excel and email
Ability to use own judgement and be aware of professional boundaries they are working to

Job Responsibility

Assisting with patient duties as required and support other team members such as clinical and Nurse Lead with patient care
Supporting the Practice with duties related to CQC outcomes and ensuring compliance is maintained
Working with patients with long term conditions such as Diabetes etc
Provide clinical procedures such as new patient health checks, BMI, blood pressure, pulse and simple wound care
Completing administrative tasks such as new patient registrations, providing appropriate leaflets, stock control and ordering

What we offer

27 days annual leave plus bank holidays pro rata
Access to our bespoke learning management system and annual formative clinical assessments to support competency development
The benefits of working with an at scale provider of primary care means that we lots of opportunities for our colleagues to specialise and develop
Car benefit scheme – specialising in electric vehicles
Cycle to work scheme
Travel season ticket loans
Discount cards
Employee wellbeing services including free yoga videos and employee wellbeing app

Parttime

Principal Engineer, ASIC Development Engineering (RTL Design)

Sandisk

Location:
India , Bengaluru

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Nice to have:

Additional Information:

Job Posted:
December 11, 2025

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