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Physical Design Engineer

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Hewlett Packard Enterprise

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Location:
India, Bangalore

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Category:
IT - Software Development

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Contract Type:
Not provided

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Salary:

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Job Description:

This role has been designed as ‘Hybrid’ with an expectation that you will work on average 2 days per week from an HPE office. Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Responsibility:

  • Responsible for all aspects of Physical Design for Fullchip/Blocks covering Floorplanning, Placement, Budgeting, Clock Tree planning & analysis, Scan re-ordering, Clock tree synthesis, Placement optimizations, Routing, Timing and SI analysis/closure, ECO tasks (both timing and functional), EM/IR, DRC, LVS, ERC analysis & fixes, Low Power solution development & implementation
  • Work closely with the methodology team to solve the implementation challenges & provide inputs to improve the Physical design flow
  • Experienced in design automation
  • Understanding of Timing constraints, SI prevention, Power reduction

Requirements:

  • 4+ years experience in ASIC physical design
  • Experience with block implementation, extraction, timing and or full-chip designs
  • Strong communication skills
  • Strong hands-on TCL/Perl development skills
  • Experience as a full-chip floorplanning, routing, or timing lead for a large silicon project
  • Track record of taping out complex chips on advanced process nodes

Nice to have:

  • Experience as a full-chip floorplanning, routing, or timing lead for a large silicon project
  • Track record of taping out complex chips on advanced process nodes
What we offer:
  • Health & Wellbeing
  • Personal & Professional Development
  • Unconditional Inclusion

Additional Information:

Job Posted:
August 13, 2025

Employment Type:
Fulltime
Work Type:
Hybrid work
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