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Lead RTL Design Engineer

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Cerebras Systems

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Location:
United States , Sunnyvale

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Category:
IT - Software Development

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Contract Type:
Not provided

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Salary:

175000.00 - 275000.00 USD / Year
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Job Description:

As a lead front-end design engineer, you will be a key part of the world-class team designing and developing the next generations of the Cerebras Wafer Scale Engine (WSE). This role requires deep expertise in RTL design and integration, with a strong focus on delivering high-performance, power-efficient, and scalable solutions. The role also requires close collaboration and management of external ASIC vendor. You will collaborate closely with the design verification, physical design, software and system teams to bring innovative semiconductor architectures from concept to production, addressing the unique challenges of building WSE systems.

Job Responsibility:

  • Drive all aspects of chip design, including Functional Specification, Micro-architecture, RTL development, Synthesis
  • Managing external ASIC vendor through product development cycle
  • Work closely with PD team members for design closure to meet PPA goals
  • Work closely with Design verification and DFT teams for achieving the best functional and test coverage
  • Work with software and system teams to understand opportunities to deliver optimal performance and feature set for the product
  • Debug silicon-level functional, timing, and power issues during bring up

Requirements:

  • Master’s degree in Computer Science, Electrical Engineering, or equivalent
  • 8-15 years of experience in delivering complex, high performance high quality RTL designs
  • Experience with Front End Chip integration and third-party IP integration
  • Demonstrated experience in networking, high-performance computing, machine learning or related fields
  • Proven track record of multiple silicon success
  • Experience collaborating and managing external vendors
  • Experience with designing/integrating high speed IO
  • Networking stack experience including TCP/IP, RDMA and Ethernet
  • Knowledge of PCIe, CPU interfaces and Serdes technology
  • Working knowledge of scripting tools : Python, TCL

Nice to have:

Experience with FPGA development toolchain, including Place and Route, Floor planning and Timing Analysis is a plus

What we offer:
  • Build a breakthrough AI platform beyond the constraints of the GPU
  • Publish and open source their cutting-edge AI research
  • Work on one of the fastest AI supercomputers in the world
  • Enjoy job stability with startup vitality
  • Our simple, non-corporate work culture that respects individual beliefs

Additional Information:

Job Posted:
February 17, 2026

Employment Type:
Fulltime
Work Type:
Hybrid work
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