CrawlJobs Logo

ASIC Design Engineer

https://www.hpe.com/ Logo

Hewlett Packard Enterprise

Location Icon

Location:
United States, Roseville

Category Icon
Category:
IT - Software Development

Job Type Icon

Contract Type:
Not provided

Salary Icon

Salary:

130500.00 - 300000.00 USD / Year

Job Description:

Join our dynamic ASIC design team at HPE Aruba Networking, where we’re building the next generation of high-performance networking silicon. As part of the team, you’ll contribute to the architecture, design, and implementation of complex integrated circuits that power our industry-leading products.

Job Responsibility:

  • Lead project teams of internal and outsourced engineers through all stages of VLSI design—from architecture and RTL to validation and physical implementation
  • Drive architecture and logic design decisions, ensuring alignment with performance, power, and area goals
  • Review and evaluate designs for compliance with internal standards and industry best practices
  • Collaborate across functions to integrate VLSI components into broader system platforms
  • Provide technical leadership and mentorship to junior engineers
  • Champion innovation by integrating new technologies and methodologies into our design flows
  • Contribute to the selection and development of future technical leaders

Requirements:

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or equivalent
  • 6–10 years of experience in VLSI design, verification, or implementation
  • Deep understanding of digital logic, computer architecture, and VLSI fundamentals
  • Proficiency in RTL design (Verilog/SystemVerilog), scripting (Python/TCL), and EDA tools (Synopsys, Cadence, etc.)
  • Strong analytical and problem-solving skills
  • Excellent verbal and written communication skills
  • Experience working in cross-functional or global teams

Nice to have:

Accountability, Action Planning, Active Learning, Active Listening, Agile Methodology, Agile Scrum Development, Analytical Thinking, Bias, Coaching, Creativity, Critical Thinking, Cross-Functional Teamwork, Data Analysis Management, Data Collection Management, Data Controls, Design, Design Thinking, Empathy, Follow-Through, Group Problem Solving, Growth Mindset, Intellectual Curiosity, Long Term Planning, Managing Ambiguity

What we offer:
  • Health & Wellbeing
  • Personal & Professional Development
  • Unconditional Inclusion

Additional Information:

Job Posted:
June 16, 2025

Employment Type:
Fulltime
Work Type:
Hybrid work
Job Link Share:

Looking for more opportunities? Search for other job offers that match your skills and interests.

Briefcase Icon

Similar Jobs for ASIC Design Engineer

New

Principal Engineer, ASIC Development Engineering (RTL Design)

We are seeking a highly skilled and experienced Principal Engineer to join our A...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • BE or Master's in Electronics or Electrical Engineering, Computer Engineering, or a related field
  • 8+ years of experience in ASIC development, with a proven track record of leading complex project
  • Hands on in IP / blocks / subsystem complex design in verilog / sysverilog
  • Strong digital design development and execution skills , solving bugs
  • Experience in grooming team of 1-4 engineers, interacting with many team
  • Deep expirience in debug , solving problem, see the architecture view, proposing solutions.
  • Hands-on experience with industry-standard EDA tools and design flows
  • Deep knowledge on PCIe, axi , DMA, AHB interfaces
  • Expertise in high-performance and low-power design techniques
  • Excellent communication skills, both verbal and written, with the ability to articulate complex technical concepts clearly
Job Responsibility
Job Responsibility
  • Design and implements IPs and subsystems
  • Dealing the best of class IPs for all SanDisk products
  • Fulltime
Read More
Arrow Right
New

ASIC RTL Design Engineer

Are you ready to push the boundaries of what's possible in technology? Join the ...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field with 14-18 years of experience
  • Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog
  • Strong understanding of SoC architecture, AMBA protocols (AXI/AHB/APB), interconnects and peripherals for debug
  • Prior knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must
  • Proficiency in scripting languages (e.g., Python, TCL) for automation
  • Hands-on with EDA tools (simulation, lint, CDC, synthesis, formal verification)
  • Strong problem-solving skills and the ability to thrive in a dynamic environment
  • Excellent communication and teamwork abilities
Job Responsibility
Job Responsibility
  • Innovate, implement, and verify RTL code for complex ASICs
  • Own SoC subsystems related to CPU complex, DDR, Host, Flash, Debug, Clocks, resets, Power domains etc. for top of the line flash controllers
  • Ensure robust design methodologies including Lint, CDC, RDC, CLP and FC-Elab
  • Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process
  • Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution
  • Lead design reviews and provide mentorship to junior engineers
  • Work along side with the SoC Managers and SoC Leads to deliver best-in-class solution
  • Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design
  • Fulltime
Read More
Arrow Right
New

ASIC Digital Design Engineering Lead

Idaho Scientific designs and deploys secure system solutions through novel CPU d...
Location
Location
United States , Boise; Salt Lake City
Salary
Salary:
Not provided
idahoscientific.com Logo
Idaho Scientific
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • US Citizenship (no exceptions)
  • Proven work experience designing and fabricating an ASIC (no exceptions)
  • Ability to get a security clearance
  • Solid technical background with at least 5 years of experience in FPGA or ASIC product development
  • Team leadership experience
  • Ability to communicate clearly in person and in written documentation
  • Degree in Computer Engineering, Computer Science, Electrical Engineering or related field
  • In-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verification
  • Strong analytical and problem solving skills
  • Extreme attention to detail
Job Responsibility
Job Responsibility
  • Lead a team of digital design engineers to create a security system on a chip
  • Collaborate with team members and across teams to explore and clearly identify real problems and solutions
  • Develop and define the microarchitecture of new Idaho Scientific IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions
  • Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages
  • Integrate complex systems that instantiate both Idaho Scientific and third party IP
  • Contribute to all aspects of design success from specification to production
  • Apply our state-of-the-art IP to ASIC and FPGA products in the real world
  • Define and improve high-quality design methods and processes
  • Mentor and guide other ASIC design engineers
What we offer
What we offer
  • Competitive Pay
  • Flexible Work Schedule
  • Health Benefits and Insurance
  • Retirement fund contributions
  • Profit Sharing
  • Generous Paid Time Off Policy
  • Fulltime
Read More
Arrow Right

Asic Physical Design Engineer

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware...
Location
Location
United States , San Jose
Salary
Salary:
148000.00 - 340500.00 USD / Year
https://www.hpe.com/ Logo
Hewlett Packard Enterprise
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • BS degree in electrical engineering
  • computer engineering
  • or a related field with 7+ years of experience in block or full-chip physical design
  • Deep design experience in large SoC designs
  • including IP integration
  • padring design
  • bump planning
  • and RDL routing strategy
  • Extensive knowledge and practices in Physical Design
  • including physically aware synthesis
Job Responsibility
Job Responsibility
  • Implement physical design at the large SoC chip level from RTL to GDSII
  • create a design database ready for manufacturing
  • Interact with IP vendors to understand IP integration requirements and integrate all blocks
  • IPs
  • and sub-chips at a large SoC level
  • Collaborate with the packaging team on Microbump/Probe Bump/Bump/Pad placement
  • Build full chip floorplan
  • including pads/ports/bump placement
  • block placement and optimization
  • block pins placement and alignment
What we offer
What we offer
  • Comprehensive suite of benefits that supports physical
  • financial and emotional wellbeing
  • Personal and professional development programs
  • Unconditional inclusion and flexibility to manage work and personal needs
  • Fulltime
Read More
Arrow Right

Asic Design Engineer

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware...
Location
Location
Costa Rica , Heredia
Salary
Salary:
Not provided
https://www.hpe.com/ Logo
Hewlett Packard Enterprise
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
  • 6-10 years of experience in VLSI design, verification, or implementation
  • Expert level proficiency in electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
  • Expert level analytical and problem solving skills
  • Expert level knowledge of designing VLSI components, integrated circuitry, architectures and algorithms into VLSI solutions
  • Expert level knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
  • Coursework in VLSI design or VLSI concepts
  • Experience in executive written and verbal communication skills
  • mastery in English and local language
  • Subject matter expertise or discipline leadership as evidenced through patents/publications in the field of VSLI or Electronic/hardware component designs and tools.
Job Responsibility
Job Responsibility
  • Provide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing
  • Reviews and evaluates designs and project activities for compliance with VLSI technology and development guidelines and standards
  • provides tangible feedback to improve product quality
  • Provides VLSI-specific and technical expertise along with the overall architecture design and platform leadership to cross-organization projects, programs, and activities
  • Provides leadership of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
  • Provides guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence
  • Participates in and provides input on process for selection of future technical leaders
  • Drives VLSI innovation and integration of new technologies into projects and activities in the design organization.
What we offer
What we offer
  • Health & Wellbeing
  • Personal & Professional Development
  • Unconditional Inclusion
  • Fulltime
Read More
Arrow Right

Asic Design Engineer

Designs, analyzes, develops, modifies and evaluates VLSI components and hardware...
Location
Location
Costa Rica , Heredia
Salary
Salary:
Not provided
https://www.hpe.com/ Logo
Hewlett Packard Enterprise
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent
  • 0-4 years of experience in VLSI design, verification or implementation
  • experience or understanding of electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
  • ability to apply analytical and problem solving skills
  • hands-on experience in designing VLSI components, integrated circuitry, architectures and developing algorithms
  • knowledge of programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools
  • coursework in VLSI design or VLSI concepts
  • good written and verbal communication skills
  • mastery in English and local language
Job Responsibility
Job Responsibility
  • designs portions of computer/server architecture and algorithms based on established VLSI engineering principles and in accordance with provided specifications and requirements
  • collaborates and communicates with management regarding design status, project progress, and issue resolution
  • designs, simulates, and tests VLSI circuits
  • ensures the VLSI designs meet quality, schedule, and cost goals for prototype or production solutions
  • participates as a member of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products
  • provides guidance and mentoring to less experienced staff members
What we offer
What we offer
  • comprehensive suite of benefits that supports physical, financial and emotional wellbeing
  • personal and professional development programs
  • unconditional inclusion
  • Fulltime
Read More
Arrow Right

ASIC Design Engineer

Join our dynamic ASIC design team at HPE Aruba Networking, where we’re building ...
Location
Location
United States , Roseville
Salary
Salary:
89400.00 - 206500.00 USD / Year
https://www.hpe.com/ Logo
Hewlett Packard Enterprise
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
  • 0–4 years of experience in VLSI design, verification, or implementation
  • Strong understanding of digital logic, computer architecture, and VLSI fundamentals
  • Exposure to ASIC or FPGA design flows
  • Experience with Verilog/SystemVerilog and EDA tools (e.g., Synopsys, Cadence)
  • Familiarity with scripting languages (e.g., Python, Perl, Tcl)
  • Excellent communication skills and a collaborative mindset
Job Responsibility
Job Responsibility
  • Design and implement portions of computer/server architecture and algorithms using VLSI engineering principles
  • Simulate and verify RTL designs to ensure functionality, performance, and power goals are met
  • Collaborate with cross-functional teams including architecture, verification, and physical design
  • Participate in design reviews and contribute to continuous improvement of design methodologies
  • Communicate project status, technical challenges, and solutions with your team and leadership
  • Mentor and support junior engineers as needed
What we offer
What we offer
  • Health & Wellbeing
  • Personal & Professional Development
  • Unconditional Inclusion
  • Fulltime
Read More
Arrow Right
New

Senior/Principal ASIC Digital Design Engineer

Idaho Scientific designs and deploys secure system solutions through novel CPU d...
Location
Location
United States , Boise; Salt Lake City
Salary
Salary:
Not provided
idahoscientific.com Logo
Idaho Scientific
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • US Citizenship (no exceptions)
  • Proven work experience designing and fabricating an ASIC (no exceptions)
  • Ability to get a security clearance
  • Solid technical background with at least 5 years of experience in FPGA or ASIC product development
  • Ability to communicate clearly in person and in written documentation
  • Degree in Computer Engineering, Computer Science, Electrical Engineering or related field
  • In-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verification
  • Strong analytical and problem solving skills
  • Extreme attention to detail
  • A willingness to roll up one’s sleeves to get the job done
Job Responsibility
Job Responsibility
  • Collaborate with team leaders to explore and clearly identify real problems and solutions
  • Develop and define the microarchitecture of new Idaho Scientific IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions
  • Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages
  • Integrate complex systems that instantiate both Idaho Scientific and third party IP
  • Contribute to all aspects of design success from specification to production
  • Apply our state-of-the-art IP to ASIC and FPGA products in the real world
  • Define and improve high-quality design methods and processes
  • Mentor and guide other ASIC design engineers
What we offer
What we offer
  • Competitive Pay
  • Flexible Work Schedule
  • Health Benefits and Insurance
  • Retirement fund contributions
  • Profit Sharing
  • Generous Paid Time Off Policy
  • Fulltime
Read More
Arrow Right
Welcome to CrawlJobs.com
Your Global Job Discovery Platform
At CrawlJobs.com, we simplify finding your next career opportunity by bringing job listings directly to you from all corners of the web. Using cutting-edge AI and web-crawling technologies, we gather and curate job offers from various sources across the globe, ensuring you have access to the most up-to-date job listings in one place.