CrawlJobs Logo

Analog Design Engineer - SerDes

amd.com Logo

AMD

Location Icon

Location:
India , Bangalore

Category Icon

Job Type Icon

Contract Type:
Not provided

Salary Icon

Salary:

Not provided

Job Description:

This job opening is for a DDR/Serdes/Analog circuit designer in a team responsible for high-speed/High Precision custom circuit blocks in AMD’s microprocessor designs. This team owns a wide variety of key IP in Digital and Analog/Mixed-Signal domains catering to products across multiple business units.

Job Responsibility:

  • Complete ownership of individual circuit blocks in a DDR PHY design in cutting edge FinFet technology nodes
  • Responsible for circuit design, layout quality, electrical and timing analysis, and reliability checks
  • Interface with cross-functional teams like SI/PI, RTL, Verification and Physical Design

Requirements:

  • Solid understanding of CMOS circuit design and general analog design concepts (Opamps, RC filters, bias circuits etc)
  • Strong hands-on experience in SerDes and DDR circuit designs in latest technology nodes, including Finfet
  • Good technical knowledge of power-performance trade-offs in high-speed designs
  • Direct experience in all phases of design analysis including functional, static timing and electrical sign-off
  • Strong understanding of the impact of variation on design performance
  • Hands-on design experience on all or some of the below blocks: PLLs (RO and/or LC), Serializer/ Deserializer, Transmitter Driver & Equalization (FFE), Clocking circuits, Receiver Equalization (CTLE, VGA, DFE etc), Bandwidth extension techniques (Tcoil etc)
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Additional Information:

Job Posted:
December 17, 2025

Job Link Share:

Looking for more opportunities? Search for other job offers that match your skills and interests.

Briefcase Icon

Similar Jobs for Analog Design Engineer - SerDes

New

Senior Analog Design Engineer

The Interface & Custom Circuit Engineering team in AI-Silicon Engineering is see...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • BSEE or equivalent, MSEE/PhD preferred
  • 7+ years of experience in analog circuit design, through full cycle post BSEE or equivalent
  • Experience with high-speed analog front-end serdes or D2D design (preferably PCIe, UCIe, D-PHY, USB), data-converters, PLLs, Regulators and all associated blocks in analog designs from architecture till silicon validation support
  • Experience in Design partitioning, power/jitter budgeting and timing analysis
  • Knowledge of lower power design techniques, calibration, parasitic extraction, EM/IR/ESD/Aging & Signal Integrity Design
  • Experience with the use of CAD-tools (Cadence, Mentor, Synopsys) for circuit schematic entry, simulations, post layout extractions, Mixed-mode simulations
  • Delivered Analog IP’s successfully in mass production in FinFET processes
  • Experience in mentoring individual engineers
  • Working with multiple stakeholders (arch/design/layout/silicon validation/project managers) to execute full design cycle till silicon
  • Excellent communication skills and self-motivated that can collaborate with larger teams within Microsoft
Job Responsibility
Job Responsibility
  • Lead Analog designs and delivery of cutting edge, high-performance, high-speed, low-power Analog IP designs for interconnectivity solutions and fundamental Analog circuit blocks for various Microsoft products in various process nodes including deep FinFet, following industry best practices
  • Technically deliver complex blocks that will produce schematics, verify in simulation, complete timing/jitter/power budgets and work with mask layout teams to deliver a final IP GDS
  • Coordinate tasks with junior members of the team, develop plans for Analog IP execution, follow processes/methodologies to deliver IP blocks
  • Coordinate bench validation of IP in Silicon, and IP characterization on bench and tester
  • Use established flows/methodologies/processes for execution
  • Work along with other members of the team to deliver IP’s, including project planning, schedule tracking, report generation
  • Interface with RTL, Verification and P&R team
  • Fulltime
Read More
Arrow Right

Analog Design, Staff Engineer

In this role, you will work on the design, development, and refinement of Multi-...
Location
Location
Canada , Ottawa
Salary
Salary:
Not provided
synopsys.com Logo
Synopsis Engineering
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Ph.D., M.Sc. with 3+ years, or B.Sc. with 5+ years of practical analog IC design experience
  • degree in Electrical Engineering or Computer Engineering or other relevant field of study
  • In depth familiarity with transistor level circuit design - sound CMOS design fundamentals
  • Detailed design experience with one, and familiarity with several other SERDES sub-circuits: receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, DAC
  • Familiarity with custom digital design (i.e. high-speed logic paths)
  • Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc)
  • Understanding of design for reliability (i.e. EM, IR, aging, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.) as well as ESD issues (i.e. circuit techniques, layout)
  • Experience with tools for schematic entry, physical layout, and design verification
  • Understanding of SPICE simulators and simulation methods
  • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture
Job Responsibility
Job Responsibility
  • Review SERDES standards to develop novel transceiver architectures and sub-block specifications
  • Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets
  • Oversee physical layout to minimize the effect of parasitics, device stress, and process variation
  • Present and review simulation data from internal project teams
  • Document design features and test plans
  • Consult on the overall electrical characterization of the SERDES IP product. Review customer silicon data for design enhancements. Propose solutions for post-silicon design updates
What we offer
What we offer
  • Comprehensive medical and healthcare plans
  • Time Away in addition to company holidays, ETO and FTO Programs
  • Family Support including maternity and paternity leave, parenting resources, adoption and surrogacy assistance
  • ESPP - Purchase Synopsys common stock at a 15% discount
  • Retirement Plans
  • Competitive salaries
  • Fulltime
Read More
Arrow Right

Senior Analog Design Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...
Location
Location
India , Hyderabad
Salary
Salary:
Not provided
synopsys.com Logo
Synopsis Engineering
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • MTech/MS with 2+ years or BTech/BS with 4+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field)
  • Proven expertise with FinFET technologies and CMOS tape-outs
  • Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures
  • Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC)
  • Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance
  • Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating)
  • Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators
  • Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results
  • Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk)
  • Excellent communication and documentation skills
Job Responsibility
Job Responsibility
  • Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications
  • Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed
  • Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality
  • Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance
  • Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews
  • Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements
  • Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates
What we offer
What we offer
  • Comprehensive medical and healthcare plans that work for you and your family
  • In addition to company holidays, we have ETO and FTO Programs
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
  • Save for your future with our retirement plans that vary by region and country
  • Competitive salaries
  • Fulltime
Read More
Arrow Right

Staff Analog Design Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...
Location
Location
India , Hyderabad
Salary
Salary:
Not provided
synopsys.com Logo
Synopsis Engineering
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field)
  • Proven expertise with FinFET technologies and CMOS tape-outs
  • Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures
  • Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC)
  • Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance
  • Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating)
  • Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators
  • Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results
  • Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk)
  • Excellent communication and documentation skills
Job Responsibility
Job Responsibility
  • Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications
  • Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed
  • Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality
  • Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance
  • Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews
  • Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements
  • Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates
What we offer
What we offer
  • Comprehensive medical and healthcare plans that work for you and your family
  • Time Away: In addition to company holidays, we have ETO and FTO Programs
  • Family Support: Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
  • ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
  • Retirement Plans: Save for your future with our retirement plans that vary by region and country
  • Competitive salaries
  • Fulltime
Read More
Arrow Right

Analog IC Design Architect

Our Hardware Engineers at Synopsys are responsible for designing and developing ...
Location
Location
United States , Boxborough
Salary
Salary:
136000.00 - 204000.00 USD / Year
synopsys.com Logo
Synopsis Engineering
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • >15 years experience in PHY analog design, including pre-silicon and post-silicon validation
  • Strong knowledge of physical IP such as SERDES, DDR/HBM or Die to Die IO Interface
  • Expertise in design trade-offs, flows, and methodologies
  • Skilled in generating and supporting documentation through written specifications, and communicating those specifications within a design team and to external customers
  • Able to work across a multi-site team to communicate ideas, understand problems, and find solutions to create a leading-edge design
  • Skilled in troubleshooting and debug of mixed-signal interfaces
  • Proficiency in using industry-standard design tools and software
  • Excellent problem-solving skills and the ability to make strategic decisions
  • Experience in leading and driving technical solutions across organization, across function, across geography
  • The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams
Job Responsibility
Job Responsibility
  • Driving the development of world class high-performance D2D IPs to enable customer chiplet bases system design win across industries
  • Designing, developing, and evaluating PHY analog components for pre-silicon and post-silicon validation
  • Driving next gen Die to Die IP architecture definition and path finding
  • Customizing PHY designs to meet specific client requirements and performance criteria
  • Performing design trade-offs to optimize power, performance, and area (PPA)
  • Developing and implementing design flows and methodologies to streamline the design process
  • Collaborating with cross-functional teams to ensure seamless integration of analog components with digital systems
  • Providing technical guidance and mentorship to junior engineers and team members
What we offer
What we offer
  • Comprehensive medical and healthcare plans that work for you and your family
  • In addition to company holidays, we have ETO and FTO Programs
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
  • Save for your future with our retirement plans that vary by region and country
  • Competitive salaries
  • Fulltime
Read More
Arrow Right

Signal Integrity Engineer

Signal Integrity Engineer role at Hewlett Packard Enterprise focusing on design ...
Location
Location
Singapore , Singapore
Salary
Salary:
Not provided
https://www.hpe.com/ Logo
Hewlett Packard Enterprise
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's or Master's degree in Electrical or Computer Engineering
  • Minimum three years of professional experience in Signal Integrity (SI) and Power Integrity (PI)
  • Experience in product system board design, Signal Integrity and Power Integrity analysis
  • Development of SI simulation methodologies
  • Conducting lab validation and correlation with simulation results
  • Solid understanding of electromagnetic theory and signal integrity fundamentals
  • Strong knowledge of digital and analog circuit design
  • Proficient in time and frequency domain channel analysis
  • Expertise in signal and power integrity for high-speed interconnects (Ethernet SerDes, PCIe, DDR4/5, USB)
  • Demonstrated expertise in PCB stack-up design
Job Responsibility
Job Responsibility
  • Design and validation of signal integrity solutions for high-end LAN products
  • Design and verification of signal and power integrity solutions for system-level high-speed communication interfaces
  • Power distribution networks design
  • High-precision timing and general-purpose I/O design
  • Performing signal integrity analysis, simulations, design of experiments and verification
  • Researching and developing innovative solutions for cutting-edge designs
  • Interconnect and power distribution network (PDN) modeling
  • Generating PCB stack-ups and design rules
  • Conducting lab measurements and verifying performance of advanced designs
  • Proactively identifying and resolving Signal Integrity (SI) and Power Integrity (PI) issues
What we offer
What we offer
  • Health & Wellbeing benefits
  • Personal & Professional Development programs
  • Unconditional Inclusion environment
  • Comprehensive suite of benefits supporting physical, financial and emotional wellbeing
  • Fulltime
Read More
Arrow Right

Staff Engineer, ASIC Development Engineering

We are seeking a highly skilled High-speed SERDES IO PHY Layout designer with 5 ...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field
  • 5-10 years of experience in IO/Analog mixed-signal IC layout design and block level PnR
  • Proficiency in layout tools such as Cadence, Synopsys, or Mentor Graphics
  • Hands-on experience with custom layout design for various analog and IO circuits is required, including expertise in Bandgap references, LDOs, Clocking circuits, GPIOs, DDR IOs, and ESD circuits
  • Familiarity with custom digital layout (i.e. high speed logic paths)
  • Knowledge of signal integrity issues (i.e. clock/data routes, differential routing, shielding)
  • Strong understanding of analog/IO design principles, including parasitic effects
  • Aware of layout techniques to mitigate ESD, latch-up issues
  • Holds advanced knowledge of CMOS and FinFET technologies and their impact on design and performance issues in deep sub-micron process nodes, specifically 7nm and below
  • Experience with layout concepts that incorporate reliability considerations, including techniques for managing electromigration (EM), IR drop, and self-heating
Job Responsibility
Job Responsibility
  • Develop and optimize Serdes PHY, analog and mixed-signal IC layouts, ensuring high performance and manufacturability
  • Collaborate with design engineers to understand design requirements and translate them into precise layouts
  • Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently
  • Work experience of block PnR to closely interact with physical design team ensuring area/timing/backend compatibility of custom blocks into the overall chip design
  • Identify and resolve layout-related issues, providing creative solutions to meet design specifications
  • Conduct layout reviews and provide technical feedback to improve layout practices and methodologies
  • Stay up-to-date with industry trends, tools, and technologies to continuously enhance layout processes
  • Fulltime
Read More
Arrow Right

Senior R&D Hardware Test Engineer

As a member of the Client Biosciences San Jose Hardware Engineering Research & D...
Location
Location
United States , San Jose
Salary
Salary:
55.00 - 58.00 USD / Hour
gomillenniumsoft.com Logo
MillenniumSoft Inc
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor’s degree in Electrical Engineering or similar technical discipline
  • Minimum 5 years of experience as a Test Engineer supporting product introduction
  • Strong experience in instrumentation measurements both analog and digital
  • Knowledgeable in PCB test standards, FPGA testing and high speed board test design
  • Methodologies of calibration and understanding of measurements uncertainty, six sigma and ICT/DFT/FCT
  • Extensive experience in testing of Digital and Analog/Mixed signal circuits
  • Experience using RF measurement instruments, high-speed oscilloscopes, signal generators, arbitrary waveform generators
  • Ability to read and interpret PCB schematics and perform basic digital and analog circuit analysis
  • Experience designing and analyzing test procedures to minimize measurement error
  • Knowledge of industrial controls systems and their communications interfaces and protocols such as Ethernet/IP
Job Responsibility
Job Responsibility
  • Interface with the R&D designers and other Hardware Engineers to define the most efficient and accurate measurement for testing the boards functionality
  • Design the test fixtures
  • Ability to remotely manage computers using SSH or VNC protocol using Git version control
  • Work closely with validation test engineers to insure that the test fixtures would satisfy module automated testing
  • Drive system verification of solutions through ATE/FCT
  • Support the HW team with sub system bring-up and test fixtures
  • Responsibility for Test definition and calibration of the ATE
  • Collaborate with HW Design Engineers to develop and execute hardware verification test plans
  • Board level functional testing
  • Design, build and program test systems used in HW testing as well as generate automated reports tracking for test results
  • Fulltime
Read More
Arrow Right